Job opening
IC/analog layout with 2nm/3nm/5nm, high-speed layout
R CUBE CREATIVE CONSULTING INC
10 locations in CA
Filed under Semiconductor Manufacturing
Full job description
Analog Layout Engineer
Bay Area, CA
Exp : Minimum 8 years and above
Skill : 2nm, 3nm and 5nm process and high speed layout (MUST)
Blocks : LDO ,ADC and SERDES
Tools : Cadence ,Virtuoso XL
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